http://en.wikipedia.org/wiki/Three-state_logic
high impedance:
http://en.wikipedia.org/wiki/High_impedance
Digital electronics
High Impedance: Low current, high voltage
Low Impedance: Low voltage, High current
In digital circuits, a high impedance (also known as hi-Z, tri-stated or floating) output is not being driven to any defined logic level by the output circuit. The signal is neither driven to a logical high nor low level; this third condition lead to the description "tri-stated". Such a signal can be seen as an open circuit (or "floating" wire) because connecting it to a low impedance circuit will not affect that circuit; it will instead itself be pulled to the same voltage as the actively driven output. The combined input/output pins found on many ICs are actualy tri-state capable outputs which have been internally connected to inputs. This is the basis for bus-systems in computers, among many other uses.
The high-impedance state of a given node in a circuit cannot be verified by a voltage measurement alone.
A pull-up resistor can be used to try to pull the wire to high and low voltage levels. If the nodes is not in a high-impedance state, extra current from the resistor will not significantly affect its voltage level.
Analog electronics:
The high impedance node is one that does not have any low impedance paths to any other nodes.
Three-state logic
3 state logic allows an output port to assume a high impedance state, effectively removing the output from the circuit. This allows multiple circuits to share the same output line or lines.
Such as a bus which cannot listen to more than one device at a time.
Active low (OE output enable) which dictates whether the outputs should be held in high-impedance state or drive their respective loads (to either 0- or 1-level)
The whole concept of the third state is to effectively remove the device's influence from the rest of the circuit. If more than one device is electrically connected, putting an output into the Hi-Z state is often used to prevent short circuits, or one device driving high (logic 1) against another device driving low (logical 0).
In particular, they are essential to the operation of a shared electronic bus.
Output enable vs. chip select
If CS is not asserted, the outputs are high impedance.
The difference lies in the time needed to output the signal. When chip select is deasserted, the chip does not operate internally, and there will be a significant delay between providing an address and receiving the data (An advantage of course, is that the chip consumes minimal power in this case.)
When chip select is asserted, the chip internally performs the access, and only the final output drivers are disabled by deasserting output enable. This can be done while the bus in use for other purposes.
Circuit designers will often use pull-up or pull-down resistors (usually within the range of 1-100kohm) to influence the circuit when the output is tri-stated. For example, I2C bus protocol (a bi-directional communication bus protocol often used between devices) specifies the use of pull-up resistors on the two communication lines. When devices are inactive, they "release " the communication lines and tri-state their outputs, thus removing their influence on the circuit. When all the devices on the bus have "released" the communication lines, the only influence on the circuit is the pull-up resistors, which pull the lines high. When a device wants to communicate, it comes out of the Hi-Z state and drives the line low. Devices communicating using this protocol either let the line float high, or drive it low-- thus preventing any bus contention situation where one device drives a line high and another low.
The PCI local bus provides pull-up resistors, but they would require several clock cycles to pull a signal high given the bus's large distributed capacitance. To enable high-speed operation, the protocol requires that every device connecting to the bus drive the important control signals high for at least one clock cycle before going to the Hi-Z state. This way, the pull-up resistors are only responsible for maintaining the bus signals in the face of leakage current.
Hardware configuration solution:
A three-state bus is typically used between chips on a single printed circuit board (PCB), or sometimes between PCBs plugged into a common backplane.
An open-collector bus is often used between PCBs plugged into a common backplane, or connected over longer cables.
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