Sunday, November 18, 2012
Dailly Reading: Open collector
Applications of open-collector devices
Because the pull-up resistor is external and need not be connected to the chip supply voltage, a lower or higher voltage can be used instead.
Open collector circuits are therefore sometimes used to interface different families of devices that have different operating voltage levels. The open-collector transistor can be rated to withstand a higher voltage than the chip supply voltage. Such devices are commonly used to drive devices such as Nixie tubes, and vacuum fluorescent displays which require higher operating voltages than the usual 5-volt logic supply.
Another advantage is that more than one open-collector output can connect to a single line.
If all outputs attached to the line are in the high-impedance state, the pull-up resistor will hold the wire in a high voltage(logic 1) state.
If one or more device outputs are in the logic 0 (ground) state, they will sink current and pull the line voltage toward ground.
Open-collector devices are commonly used to connect multiple devices to a bus (i.e., one carrying interrupt or write-enable signals). This enables one device to drive the bus without interference from the other inactive devices - if open-collector devices are not used, then the outputs of the inactive devices would attempt to hold the bus voltage high, resulting in unpredictable output.
By tying the output of several open collectors together, the common line becomes a "wired AND" (positive-true logic) or "wired OR" (negative-true logic) gate.
A "wired OR" behaves like the boolean OR for negative-true logic, where the output is LOW if any one of its inputs is low. Such circuit constructions are termed "wired-AND" and "wired-OR",
Hardware Porting Solution:
SCSI-1 devices use open collector for electrical signaling. [1] SCSI-2 and SCSI-3 may use EIA-485.
SCSI Parallel Interface??
Because the pull-up resistor is external and need not be connected to the chip supply voltage, a lower or higher voltage can be used instead.
Open collector circuits are therefore sometimes used to interface different families of devices that have different operating voltage levels. The open-collector transistor can be rated to withstand a higher voltage than the chip supply voltage. Such devices are commonly used to drive devices such as Nixie tubes, and vacuum fluorescent displays which require higher operating voltages than the usual 5-volt logic supply.
Another advantage is that more than one open-collector output can connect to a single line.
If all outputs attached to the line are in the high-impedance state, the pull-up resistor will hold the wire in a high voltage(logic 1) state.
If one or more device outputs are in the logic 0 (ground) state, they will sink current and pull the line voltage toward ground.
Open-collector devices are commonly used to connect multiple devices to a bus (i.e., one carrying interrupt or write-enable signals). This enables one device to drive the bus without interference from the other inactive devices - if open-collector devices are not used, then the outputs of the inactive devices would attempt to hold the bus voltage high, resulting in unpredictable output.
By tying the output of several open collectors together, the common line becomes a "wired AND" (positive-true logic) or "wired OR" (negative-true logic) gate.
A "wired OR" behaves like the boolean OR for negative-true logic, where the output is LOW if any one of its inputs is low. Such circuit constructions are termed "wired-AND" and "wired-OR",
Hardware Porting Solution:
SCSI-1 devices use open collector for electrical signaling. [1] SCSI-2 and SCSI-3 may use EIA-485.
SCSI Parallel Interface??
Dailly reading: Tri-state logic and high impedence
Three-state logic
http://en.wikipedia.org/wiki/Three-state_logic
high impedance:
http://en.wikipedia.org/wiki/High_impedance
Digital electronics
High Impedance: Low current, high voltage
Low Impedance: Low voltage, High current
In digital circuits, a high impedance (also known as hi-Z, tri-stated or floating) output is not being driven to any defined logic level by the output circuit. The signal is neither driven to a logical high nor low level; this third condition lead to the description "tri-stated". Such a signal can be seen as an open circuit (or "floating" wire) because connecting it to a low impedance circuit will not affect that circuit; it will instead itself be pulled to the same voltage as the actively driven output. The combined input/output pins found on many ICs are actualy tri-state capable outputs which have been internally connected to inputs. This is the basis for bus-systems in computers, among many other uses.
The high-impedance state of a given node in a circuit cannot be verified by a voltage measurement alone.
A pull-up resistor can be used to try to pull the wire to high and low voltage levels. If the nodes is not in a high-impedance state, extra current from the resistor will not significantly affect its voltage level.
Analog electronics:
The high impedance node is one that does not have any low impedance paths to any other nodes.
Three-state logic
3 state logic allows an output port to assume a high impedance state, effectively removing the output from the circuit. This allows multiple circuits to share the same output line or lines.
Such as a bus which cannot listen to more than one device at a time.
Active low (OE output enable) which dictates whether the outputs should be held in high-impedance state or drive their respective loads (to either 0- or 1-level)
The whole concept of the third state is to effectively remove the device's influence from the rest of the circuit. If more than one device is electrically connected, putting an output into the Hi-Z state is often used to prevent short circuits, or one device driving high (logic 1) against another device driving low (logical 0).
In particular, they are essential to the operation of a shared electronic bus.
Output enable vs. chip select
If CS is not asserted, the outputs are high impedance.
The difference lies in the time needed to output the signal. When chip select is deasserted, the chip does not operate internally, and there will be a significant delay between providing an address and receiving the data (An advantage of course, is that the chip consumes minimal power in this case.)
When chip select is asserted, the chip internally performs the access, and only the final output drivers are disabled by deasserting output enable. This can be done while the bus in use for other purposes.
Circuit designers will often use pull-up or pull-down resistors (usually within the range of 1-100kohm) to influence the circuit when the output is tri-stated. For example, I2C bus protocol (a bi-directional communication bus protocol often used between devices) specifies the use of pull-up resistors on the two communication lines. When devices are inactive, they "release " the communication lines and tri-state their outputs, thus removing their influence on the circuit. When all the devices on the bus have "released" the communication lines, the only influence on the circuit is the pull-up resistors, which pull the lines high. When a device wants to communicate, it comes out of the Hi-Z state and drives the line low. Devices communicating using this protocol either let the line float high, or drive it low-- thus preventing any bus contention situation where one device drives a line high and another low.
The PCI local bus provides pull-up resistors, but they would require several clock cycles to pull a signal high given the bus's large distributed capacitance. To enable high-speed operation, the protocol requires that every device connecting to the bus drive the important control signals high for at least one clock cycle before going to the Hi-Z state. This way, the pull-up resistors are only responsible for maintaining the bus signals in the face of leakage current.
Hardware configuration solution:
http://en.wikipedia.org/wiki/Three-state_logic
high impedance:
http://en.wikipedia.org/wiki/High_impedance
Digital electronics
High Impedance: Low current, high voltage
Low Impedance: Low voltage, High current
In digital circuits, a high impedance (also known as hi-Z, tri-stated or floating) output is not being driven to any defined logic level by the output circuit. The signal is neither driven to a logical high nor low level; this third condition lead to the description "tri-stated". Such a signal can be seen as an open circuit (or "floating" wire) because connecting it to a low impedance circuit will not affect that circuit; it will instead itself be pulled to the same voltage as the actively driven output. The combined input/output pins found on many ICs are actualy tri-state capable outputs which have been internally connected to inputs. This is the basis for bus-systems in computers, among many other uses.
The high-impedance state of a given node in a circuit cannot be verified by a voltage measurement alone.
A pull-up resistor can be used to try to pull the wire to high and low voltage levels. If the nodes is not in a high-impedance state, extra current from the resistor will not significantly affect its voltage level.
Analog electronics:
The high impedance node is one that does not have any low impedance paths to any other nodes.
Three-state logic
3 state logic allows an output port to assume a high impedance state, effectively removing the output from the circuit. This allows multiple circuits to share the same output line or lines.
Such as a bus which cannot listen to more than one device at a time.
Active low (OE output enable) which dictates whether the outputs should be held in high-impedance state or drive their respective loads (to either 0- or 1-level)
The whole concept of the third state is to effectively remove the device's influence from the rest of the circuit. If more than one device is electrically connected, putting an output into the Hi-Z state is often used to prevent short circuits, or one device driving high (logic 1) against another device driving low (logical 0).
In particular, they are essential to the operation of a shared electronic bus.
Output enable vs. chip select
If CS is not asserted, the outputs are high impedance.
The difference lies in the time needed to output the signal. When chip select is deasserted, the chip does not operate internally, and there will be a significant delay between providing an address and receiving the data (An advantage of course, is that the chip consumes minimal power in this case.)
When chip select is asserted, the chip internally performs the access, and only the final output drivers are disabled by deasserting output enable. This can be done while the bus in use for other purposes.
Circuit designers will often use pull-up or pull-down resistors (usually within the range of 1-100kohm) to influence the circuit when the output is tri-stated. For example, I2C bus protocol (a bi-directional communication bus protocol often used between devices) specifies the use of pull-up resistors on the two communication lines. When devices are inactive, they "release " the communication lines and tri-state their outputs, thus removing their influence on the circuit. When all the devices on the bus have "released" the communication lines, the only influence on the circuit is the pull-up resistors, which pull the lines high. When a device wants to communicate, it comes out of the Hi-Z state and drives the line low. Devices communicating using this protocol either let the line float high, or drive it low-- thus preventing any bus contention situation where one device drives a line high and another low.
The PCI local bus provides pull-up resistors, but they would require several clock cycles to pull a signal high given the bus's large distributed capacitance. To enable high-speed operation, the protocol requires that every device connecting to the bus drive the important control signals high for at least one clock cycle before going to the Hi-Z state. This way, the pull-up resistors are only responsible for maintaining the bus signals in the face of leakage current.
Hardware configuration solution:
A three-state bus is typically used between chips on a single printed circuit board (PCB), or sometimes between PCBs plugged into a common backplane.
An open-collector bus is often used between PCBs plugged into a common backplane, or connected over longer cables.
Friday, November 16, 2012
How to grep word
http://tldp.org/LDP/Bash-Beginners-Guide/html/sect_04_02.html
If you want to get a list of all five-character English dictionary words starting with "c" and ending in "h" (handy for solving crosswords):
For matching multiple characters, use the asterisk. This example selects all words starting with "c" and ending in "h" from the system's dictionary:
If you want to get a list of all five-character English dictionary words starting with "c" and ending in "h" (handy for solving crosswords):
cathy ~> grep '\<c...h\>' /usr/share/dict/words
catch
clash
cloth
coach
couch
cough
crash
crush
For matching multiple characters, use the asterisk. This example selects all words starting with "c" and ending in "h" from the system's dictionary:
cathy ~> grep '\<c.*h\>' /usr/share/dict/words caliph cash catch cheesecloth cheetah --output omitted--
Thursday, November 15, 2012
vimdiff Tutorial
http://amjith.blogspot.com/2008/08/quick-and-dirty-vimdiff-tutorial.html
- If you load up two files in splits (:vs or :sp), you can do :diffthis on each window and achieve a diff of files that were already loaded in buffers
- :diffoff can be used to turn off the diff mode.
How to use non-blocking sends and receives to great effect
http://www.cs.ucsb.edu/~hnielsen/cs140/mpi-deadlocks.html
The send and receive calls are almost exactly the same as the blocking versions, with two differences. The first (which is conceptually important) is that the function will return immediately, regardless of whether the send or receive has finished. The second (which is important for the implementation) is that they take an MPI_Request pointer as the final parameter. This is later used to verify that the send or receive has been completed by calling MPI_Wait().
It is important to note that you can use any combination of blocking and non-blocking receives!
Concept: Race Condition
electronics
Computing
Filesystem
http://en.wikipedia.org/wiki/Race_condition
The send and receive calls are almost exactly the same as the blocking versions, with two differences. The first (which is conceptually important) is that the function will return immediately, regardless of whether the send or receive has finished. The second (which is important for the implementation) is that they take an MPI_Request pointer as the final parameter. This is later used to verify that the send or receive has been completed by calling MPI_Wait().
It is important to note that you can use any combination of blocking and non-blocking receives!
Concept: Race Condition
electronics
Computing
Filesystem
http://en.wikipedia.org/wiki/Race_condition
Summary
- Use the calls MPI_Isend() or MPI_Irecv() to initiate a non-blocking transfer.
- Always include an MPI_Wait() after a non-blocking call. The buffer you specified in the send or receive doesn't contain modifiable (in the case of sending) or even readable data (in the case of receiving) until this call completes.
- You can use a non-blocking call with a blocking call. Most of the example code does this.
- Be very careful about race conditions in the data. Don't write to data that is being sent, and don't read or write to data that is being received.
Wednesday, November 14, 2012
Dailly Reading: Asynchronous_I/O (wiki)
http://en.wikipedia.org/wiki/Asynchronous_I/O
Asynchronous I/O (non-blocking I/O),
Keywords/Concept map:
Hardware device status polled
hardware interrupts
Multitasking operating systems
Spooling?
multithreading
Forms:
All forms of asynchronous I/O open applications up to potential resource conflicts and associated failure. Careful programming often using
mutual exclusion, semaphores, etc)
Signals (Interrupts)
Available in BSD and POSIX Unix. I/O is issued asynchronously, and when it is complete a signal (interrupt) is generated. As in low-level kernel programming, the facilities structures as seen by the signal handler. The signal handler is usually not able to issue further asynchronous I/O by itself.
IO Synchronous Asynchronous Blocking IO Non Blocking IO (In chinese) http://blog.csdn.net/historyasamirror/article/details/5778378
Richard Stevens:
Unix Network Programming Volume 1, Third Edition: The Sockets Networking.
Section 6.2 I/O Models
Asynchronous I/O (non-blocking I/O),
Keywords/Concept map:
Hardware device status polled
hardware interrupts
Multitasking operating systems
Spooling?
multithreading
Forms:
All forms of asynchronous I/O open applications up to potential resource conflicts and associated failure. Careful programming often using
mutual exclusion, semaphores, etc)
Signals (Interrupts)
Available in BSD and POSIX Unix. I/O is issued asynchronously, and when it is complete a signal (interrupt) is generated. As in low-level kernel programming, the facilities structures as seen by the signal handler. The signal handler is usually not able to issue further asynchronous I/O by itself.
IO Synchronous Asynchronous Blocking IO Non Blocking IO (In chinese) http://blog.csdn.net/historyasamirror/article/details/5778378
Richard Stevens:
Unix Network Programming Volume 1, Third Edition: The Sockets Networking.
Section 6.2 I/O Models
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